In general, test equipment to perform a function test of an LSI (hereinafter referred to as “LSI tester”) inputs a predetermined test pattern signal into an LSI to be measured which is an object to be tested (device under test: DUT), compares output data output from the LSI to be measured with a predetermined expectation value pattern signal, and judges agreement/disagreement to detect/judge whether or not the LSI to be measured is failure.
Conventional test equipment for an LSI to be measured will be described hereinafter with reference to FIG. 10.
FIG. 10 is a block diagram showing a conventional constitution of the test equipment for the LSI to be measured.
As shown in the figure, a conventional LSI tester 110 comprises: the LSI tester 110 including a level comparator 111 which compares a level of output data of an LSI to be measured 101 with that of a comparison voltage; a pattern comparator 112 which compares the output data of the LSI to be measured 101 with a predetermined expectation value; and a flip flop 121 for inputting the output data of the LSI to be measured 101 into the pattern comparator 112 at a predetermined timing.
In the conventional test equipment for the LSI to be measured constituted in this manner, first a predetermined test pattern signal is input to the LSI to be measured 101 from a pattern generation unit (not shown), and a signal responsive to the test pattern siganl is output as the output data from the LSI to be measured 101.
The output data output from the LSI to be measured 101 is input into the level comparator 111 of the LSI tester 110. The output data input into the level comparator 111 is level-compared with the comparison voltage, and output to the flip flop 121. In the flip flop 121, the signal from the level comparator 111 is held as input data, and the output data is output at a predetermined timing using strobe from a timing generation unit (not shown) as a clock signal.
The output data output from the flip flop 121 is input into the pattern comparator 112, and compared with predetermined expectation value data output from a pattern generation unit in the tester, and a comparison result is output. Moreover, agreement/disagreement between the output data and expectation value is detected by the comparison result, and it is judged whether or not the LSI to be measured 101 is failure (pass/fail).
In this manner, in the conventional LSI tester, the output data output from the LSI to be measured is acquired at a timing of strobe output at a predetermined timing in the tester, and an output timing of the strobe has been fixed. However, since the output data of the LSI to be measured has a jitter (irregular fluctuation of the timing), the value of even the same output data acquired at the fixed timing of the strobe is not constant, and a problem has occurred that a correct test result is not obtained.
The fluctuation of the acquired data by the jitter will be described with reference to FIG. 11. As shown in FIG. 11(a), the output data of the LSI to be measured has the jitter with a width in a certain range, and a change point (rising or falling edge) of the output data shifts by the jitter width. Therefore, when the output data having this jitter is taken in at the fixed strobe, as shown in FIG. 11(b), for example, the acquired data is “H” in case of “output data 1”, but the data is “L” in case of “output data 2”.
Therefore, in the conventional test equipment which acquires the output data by the fixed strobe, the data which is originally the same fluctuates by an influence of jitter, and a problem has occurred that correct test or judgment is difficult. Especially, the influence of the jitter is a serious problem for a high speed LSI.
It is to be noted that to measure/analyze the jitter of the LSI to be measured, the output data of the LSI to be measured has heretofore been measured by jitter measurement units such as an oscilloscope by repeating the measuring process a plurality of times, and a jitter amount, a distribution of jitters and the like have been analyzed based on measurement results. However, in the conventional jitter analysis using a jitter measurement unit, there is a possibility that an error is generated in the operation of the oscilloscope or the like. It is difficult to analyze the jitter with high precision. Moreover, an operation of acquiring and measuring a large number of data is complicated, and a problem that the jitter analysis requires much time and labor has been pointed out. Especially in the high speed LSI, such difficulty in the jitter analysis has been a serious problem.
Additionally, in recent years, progress of the high-rate LSI has been remarkable, and an LSI in which higher-rate processing is possible has been developed using “RapidIO” (registered trademark), “HyperTransport” (registered trademark) or the like noted as a next-generation input/output interface which achieves high-rate data transfer (e.g., CPU or the like for the next “PowerPC” (registered trademark) manufactured by IBM, Ltd.). Moreover, this type of LSI has used a constitution in which the LSI itself outputs a clock signal. Additionally, the LSI itself outputs the clock signal even in a bridge LSI for converting a bus system constituting a transmission line into the above-described “RapidIO” from the conventional PCI bus.
As a result of intensive researches, the present inventor has realized that when the output data can be acquired at a timing of the clock output from the LSI in performing the function test of the LSI outputting the clock signal by itself, the fluctuation of the acquired data by the influence of the jitter shown in FIG. 11 can be eliminated. Furthermore, it has been realized that by the use of a circuit capable of acquiring the output data at the timing of the clock output from the LSI, it is also possible to analyze the jitter of the LSI, and further the phase difference between the clock and output data output from the LSI by the jitter can also be detected.
That is, the present invention has been proposed to solve the problem involved in the above-described conventional technique, and an object is to provide a test equipment for an LSI as a device under test, in which a source synchronous circuit for outputting a clock and output data from the LSI to be measured as level data in a time series is disposed, so that a clock signal output from the LSI to be measured is usable as a timing signal for acquiring the output data of the LSI to be measured and which is capable of taking in the output data at a signal change point synchronized with a jitter and which is capable of obtaining a correct test result without being influenced by the jitter and which is suitable for a function test of a high-rate LSI having a data rate exceeding, for example, 1GHz.
Moreover, an object of the present invention is to provide a jitter analyzer and a phase difference detector for an LSI to be measured, in which by use of a source synchronous circuit for outputting level data in a time series indicating a clock and output data of the LSI to be measured, jitter analysis for the LSI to be measured and detection of a phase difference between the clock and output data by a jitter can be easily and securely performed without causing any complicated operation or error.